1. Field of the Invention
The present invention relates to semiconductor transistors and specifically to protecting power MOSFETs from exceeding their safe operating areas.
2. Description of the Prior Art
Switched mode power supplies, almost by definition, use a high-voltage, high-current MOSFET to switch current on and off in the primary winding of an output transformer. To protect the MOSFET, and to indirectly measure the load on the output transformer, a sense resistor is typically placed between the source of the MOSFET and ground. This practice may appear contradictory in view of the fact that semiconductor process engineers expend much effort into producing such transistors with very low values of drain on resistance (R.sub.DON). A voltage develops across the sense resistor that is proportional to the current, and this sense voltage can then be used by a comparator to turn off the MOSFET when the current exceeds a preset limit and to control output power levels with a closed-loop feedback servo.
A conventional way of implementing a current limiting circuit is illustrated in FIG. 1. A prior art power supply 10 includes an output transformer 12 with a primary winding 14, and a switched mode power supply chip 16 that comprises a pulse width modulation (PWM) circuit 18, a high-voltage MOSFET 20, a sense resistor 22 and a current-limit comparator 24. An over-current condition causes a voltage drop across resistor 22 to exceed a predetermined threshold voltage (Vth) at comparator 24. The output voltage of comparator 24 will cause a flip-flop 26 to reset, thus lowering the Q-output and turning off MOSFET 20 and interrupting the current flow through primary winding 14.
Resistor 22 preferably has a value equal to a fraction of a ohm. Unfortunately, precision, low value resistors are difficult to fabricate in integrated circuits. The value of resistor 22 adds to the R.sub.on of MOSFET 20. With resistor 22 at a low value of resistance, the voltage developed across it will be proportionately small, and the comparator threshold voltage Vth is susceptible to being buried or confused with ground noise. Noise immunity figures therefore suffer. Any current limit value must be set at some margin below the device destruction current level (I.sub.DSS) of MOSFET 20 to assure that MOSFET 20 does not go into saturation before such destructive current is reached. Otherwise, voltages across a saturated MOSFET 20 can reach levels that exceed the device safe operating area. Therefore, the current limit is conventionally set well below the I.sub.DSS value, in order to allow for process variations of I.sub.DSS and comparator threshold tolerances. Consequently, device maximum operating currents are artificially limited and larger, more expensive MOSFETs must be used in compensation.
A part of the source area of MOSFET 20 may be used as a sense FET to indirectly sense the total current. In FIG. 2, a prior art power supply 30 includes an output transformer 32 with a primary winding 34, and a switched mode power supply chip 36 that comprises a pulse width modulation (PWM) circuit 38, a high-voltage MOSFET 40, a sense resistor 42 and a current-limit comparator 44. An over-current condition causes a voltage drop across resistor 42 to exceed a predetermined threshold voltage (Vth) at comparator 44. The output of comparator 44 will cause a flip-flop 46 to reset, thus lowering the Q-output and turning off MOSFET 40 and interrupting the current flow through primary winding 34. The technique of using two sources in MOSFET 40 can overcome many of the disadvantages mentioned in connection with power supply 10. Resistor 42 can be larger in value than resistor 22 and a higher threshold voltage Vth can be used in power supply 30 without sacrificing performance. However, the ratio of the sense current to total current in MOSFET 40 is only accurate when the on-drain voltage is large compared to the voltage Vth. In actual practice, the drain voltage is usually designed to be low to keep losses to a minimum. Therefore, a much larger margin is needed for the current limit to guarantee that MOSFET 40 will not be destroyed before the protection circuit operates. Consequently, device maximum operating currents are even more artificially limited and still larger, more expensive MOSFETs must be used in compensation for power supply 30.
In FIG. 3, a prior art power supply 50 includes an output transformer 52 with a primary winding 54, and a switched mode power supply chip 56 that comprises a pulse width modulation (PWM) circuit 58, a high-voltage MOSFET 60, a current-limit comparator 62 and an AND-gate 64. The voltage on the drain of MOSFET 60 can be sampled during the periods MOSFET 60 is on to sense an over current condition. AND-gate 64 will only allow comparator 62 to switch off MOSFET 60 if the comparison at the inputs of comparitor 62 is being made when the gate of MOSFET 60 is high. The drain on resistance (R.sub.DON) of MOSFET 60 is equivalent to using a sense resistor. It is possible with this circuit configuration to detect when MOSFET 60 is going into saturation, thus making it possible to protect it from safe operating area failure. Power supply 50 is relatively insensitive to process variations of I.sub.DSS for MOSFET 60 and in threshold voltage Vth. Operation closer to the maximum current capability of MOSFET 60 is possible because smaller safety margins are possible. Unfortunately, the drain of MOSFET 60 is a high voltage pin and that makes it very difficult to design a circuit for comparator 62 that can withstand the voltage when MOSFET 60 is off. This is particularly true from a monolithic chip implementation. Even if the obstacles are overcome, the implementation of such a high voltage circuit to sense drain voltage requires an excessive amount of chip area.